#objdump: -dw
#name: 64-bit insns not sizeable through register operands evex
#source: noreg64-evex.s
#warning_output: noreg64-evex.e

.*: +file format .*

Disassembly of section \.text:

0+ <_start>:
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 83 10 01[	 ]+\{evex\} adcl \$0x1,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 81 10 89 00 00 00[	 ]+\{evex\} adcl \$0x89,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 81 10 34 12 00 00[	 ]+\{evex\} adcl \$0x1234,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 81 10 78 56 34 12[	 ]+\{evex\} adcl \$0x12345678,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 83 00 01[	 ]+\{evex\} addl \$0x1,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 81 00 89 00 00 00[	 ]+\{evex\} addl \$0x89,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 81 00 34 12 00 00[	 ]+\{evex\} addl \$0x1234,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 81 00 78 56 34 12[	 ]+\{evex\} addl \$0x12345678,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 83 20 01[	 ]+\{evex\} andl \$0x1,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 81 20 89 00 00 00[	 ]+\{evex\} andl \$0x89,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 81 20 34 12 00 00[	 ]+\{evex\} andl \$0x1234,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 81 20 78 56 34 12[	 ]+\{evex\} andl \$0x12345678,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 04 0a 83 38 01[	 ]+ccmptl \{dfv=\} \$0x1,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 04 0a 81 38 89 00 00 00[	 ]+ccmptl \{dfv=\} \$0x89,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 04 0a 81 38 34 12 00 00[	 ]+ccmptl \{dfv=\} \$0x1234,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 04 0a 81 38 78 56 34 12[	 ]+ccmptl \{dfv=\} \$0x12345678,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 f1 00[	 ]+\{evex\} crc32l \(%rax\),%eax
[	 ]*[a-f0-9]+:[	 ]*62 f4 fc 08 f1 00[	 ]+\{evex\} crc32q \(%rax\),%rax
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 ff 08[	 ]+\{evex\} decl \(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 f7 30[	 ]+\{evex\} divl \(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 f7 38[	 ]+\{evex\} idivl \(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 f7 28[	 ]+\{evex\} imull \(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 ff 00[	 ]+\{evex\} incl \(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 f7 20[	 ]+\{evex\} mull \(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 f7 18[	 ]+\{evex\} negl \(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 f7 10[	 ]+\{evex\} notl \(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 83 08 01[	 ]+\{evex\} orl \$0x1,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 81 08 89 00 00 00[	 ]+\{evex\} orl \$0x89,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 81 08 34 12 00 00[	 ]+\{evex\} orl \$0x1234,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 81 08 78 56 34 12[	 ]+\{evex\} orl \$0x12345678,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 d1 10[	 ]+\{evex\} rcll \$1,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 c1 10 02[	 ]+\{evex\} rcll \$0x2,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 d3 10[	 ]+\{evex\} rcll %cl,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 d1 18[	 ]+\{evex\} rcrl \$1,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 c1 18 02[	 ]+\{evex\} rcrl \$0x2,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 d3 18[	 ]+\{evex\} rcrl %cl,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 d1 00[	 ]+\{evex\} roll \$1,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 c1 00 02[	 ]+\{evex\} roll \$0x2,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 d3 00[	 ]+\{evex\} roll %cl,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 d1 08[	 ]+\{evex\} rorl \$1,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 c1 08 02[	 ]+\{evex\} rorl \$0x2,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 d3 08[	 ]+\{evex\} rorl %cl,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 d1 20[	 ]+\{evex\} shll \$1,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 c1 20 02[	 ]+\{evex\} shll \$0x2,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 d3 20[	 ]+\{evex\} shll %cl,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 d1 38[	 ]+\{evex\} sarl \$1,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 c1 38 02[	 ]+\{evex\} sarl \$0x2,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 d3 38[	 ]+\{evex\} sarl %cl,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 83 18 01[	 ]+\{evex\} sbbl \$0x1,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 81 18 89 00 00 00[	 ]+\{evex\} sbbl \$0x89,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 81 18 34 12 00 00[	 ]+\{evex\} sbbl \$0x1234,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 81 18 78 56 34 12[	 ]+\{evex\} sbbl \$0x12345678,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 d1 20[	 ]+\{evex\} shll \$1,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 c1 20 02[	 ]+\{evex\} shll \$0x2,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 d3 20[	 ]+\{evex\} shll %cl,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 d1 28[	 ]+\{evex\} shrl \$1,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 c1 28 02[	 ]+\{evex\} shrl \$0x2,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 d3 28[	 ]+\{evex\} shrl %cl,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 83 28 01[	 ]+\{evex\} subl \$0x1,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 81 28 89 00 00 00[	 ]+\{evex\} subl \$0x89,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 81 28 34 12 00 00[	 ]+\{evex\} subl \$0x1234,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 81 28 78 56 34 12[	 ]+\{evex\} subl \$0x12345678,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 04 0a f7 00 89 00 00 00[	 ]+ctesttl \{dfv=\} \$0x89,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 04 0a f7 00 34 12 00 00[	 ]+ctesttl \{dfv=\} \$0x1234,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 04 0a f7 00 78 56 34 12[	 ]+ctesttl \{dfv=\} \$0x12345678,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 83 30 01[	 ]+\{evex\} xorl \$0x1,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 81 30 89 00 00 00[	 ]+\{evex\} xorl \$0x89,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 81 30 34 12 00 00[	 ]+\{evex\} xorl \$0x1234,\(%rax\)
[	 ]*[a-f0-9]+:[	 ]*62 f4 7c 08 81 30 78 56 34 12[	 ]+\{evex\} xorl \$0x12345678,\(%rax\)
#pass
